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| Backplane PICMG2.0 Rev3.0 （6U-size） 650-CPCIxxWRB Family |
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■Features
- This is a backplane whose PCI clock conforming to the PICMG2.0 REV3.0 works with 33MHz or 66MHz.
- The connectors P3, P4, and P5 of each slot are of long pins and mount a rear shroud, and the a, b, c, d, and e rows are open and can be used so that they may be used as the rear panel I/O.
- The characteristic impedance is set to 65Ω±10％.
- Power can be supplied by the plug-in power supply from the front face or by terminal wiring from the rear face.
| （650-CPCI05WRB） |
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| Specifications | |
| PCB specification | FR-4 (4.6t), 10 layers |
| Connentor | 2mm HM connector |
| Power feed method | Plug-in power supply method or screw terminal method |
| +5V･･････100A
Max. +3.3V････30A Max. VI/O･････30A Max. +12V･･････10A Max. -12V･･････10A Max. GND |
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| For operation with the PCI clock of 66MHz, open the M66EN jumper pin. |
| Order code Table | |||||
| Order code | No. of slots | System slot | Size | ｔ | No. of layers |
| 650-CPCI05WRB | 5 | Right side from the front face | 170.00 x 261.95 | 4.6 | 10 |
