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Dual Standard Fabric Packet Switching Backplane PICMG2.16 Rev1.0 650-CDFP07WL

■Features

1. 1. This is a 7U 7-slot CPCI/PSB bus backplane conforming to the PICMG2.16 REV1.0 specification.
2. 2. P1 and P2 are based on the 64-bit bus wiring specification of the PICMG2.0 REV3.0 specification, and the single-end impedance (Zo) is set to 65Ω±10％.
   P3 is based on the Ethernet bus wiring specification compatible with the dual fabric board (NodeLink a/b), and the differential impedance is set to 100 Ω± 10%.

Specifications
PCB specification	FR-4 (4.6t), 10 layers
Supply power capacity	＋5V, 90A ＋3.3V, 60A ±12V, 10A

| Pin Assignment Table |

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