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Dual Standard Fabric Packet Switching Backplane PICMG2.16 Rev1.0 650-CDFP08WLP

■Features

1. This is a 7U 7-slot CPCI/PSB bus backplane conforming to the PICMG2.16 REV1.0 specification.
2. P1 and P2 are made to the system slot specification of the PICMG2.0, REV3.0 standards. The single end impedance (Z0) is set to 65Ω±10％. The system enable is to be realized with a jumper.
3. P3 is based on the Ethernet bus wiring specification compatible with the dual fabric board (NodeLink a/b), and the differential impedance is set to 100 Ω± 10%.

Specifications
PCB specification	FR-4 (4.6t), 10 layers
Supply power capacity	＋5V, 90A ＋3.3V, 60A ±12V, 10A

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